
Dalsa-Coreco X64-CL-EXPRESS Camera Link Frame Grabber
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→ Acquisition: Supports two independent Base or one Medium; Camera Link area or line scan cameras; Acquisition pixel clock rates up to 85MHz
→ Resolution: Horizontal Size (min/max)= 8 byte/256K bytes;Vertical Size (min/max)= 1 line/infinite lines for line-scan cameras,1 line/16 million lines/frame for area-scan cameras;Variable length frame size from 1 to 16 million lines for area-scan cameras;32MB on-board frame buffer memory;Integrated advanced tap reversal engine allows independent tap formatting
→ Pixel Format and Tap configurations: Supports Camera Link tap configurations for 8, 10, or 12 bit mono, RGB and Bayer cameras= For 1 Medium or two Base cameras in any of the following combinations3x8 bit/tap, 2x10 bit/ tap, 2x12 bit/tap, 1x14 bit/tap, 1x16 bit/tap, & 1x24 bit/RGB; For Medium camera4x8 bit/tap, 4x10 bits/tap, 4x12 bit/tap, 1x30 bit/RGB, & 1x36 bit/tap1
→ Transfers: Real-time transfers to system memory;PCI Express x1255MB/sec;Intelligent Data- Transfer-Engine automatically loads scatter-gather and tap description tables fro the host memory without CPU intervention
→ On-board Processing,Bayer Mosaic Filter:Hardware Bayer Engine supports one 8, 10 or 12 bit Bayer camera input;Bayer output format supports 8 or 10 bit RGB/pixel;Zero host CPU utilization for Bayer conversion
→ Shading Correction: On the fly Flat-line and Flat-field correction with dead-pixel replacement;Supports two independent monochrome cameras concurrently
→ Input Lookup Tables: Per Camera Input
→ Monochrome:For each input one 256x8 bit, 1024x10 bit, 1024x8 bit, 4096x12 bit, 4096x10 bit or4096x8 bit iLUTs per camera input
→ Colour: 3x256x8-bit for Base Camera Link and 3x1024x10- bit or 3x4096x12-bit for Medium Camera Link RGB cameras
→ Controls: Comprehensive event notification includes end/frame/transfer;Independent timing control logic for up to two Camera Link cameras;Two independent TTL/LVDS trigger inputs programmable as active high or low (edge orlevel trigger);Two independent TTL Strobes outputs;Two PC independent serial communications ports;provide seamless interface to MS Windows applications;Quadrature (AB) shaft-encoder inputs for external web synchronization
→ Options:Optional general purpose IO module supports=8 inputs and 8 TTL outputs;inputs support TTL and 24V operations; TTL outputs support PNP and NPN operations
→ Power Output:Power-on-reset fused 12V/ 5V DC output at 1.5A
→ Software: Microsoft Windows 2000, Windows XP Professional,Windows XP Professional x64;Full support of Teledyne DALSA's Sapera Essential and Sapera Processing software libraries;Application development using C DLLs and ActiveX controls with Microsoft Visual Studio Microsoft .Net Compatible
→ System requirements: PCI-Express x1 or higher lane width compliant system and 64MB system memory
→ Dimensions: 6.6" (16.7cm) Length X 4.35" (11cm) Height
→ Temperature: 0°C (32°F) to 50°C (122°F);Relative Humidity: up to 95% (non-condensing)
→ Markings: FCC Class B Approved;CEApproved
The X64-CL Express is a Camera Link frame grabber
that is based on the PCI Express x1 interface next generation bus
interface technology for the host PCs. PCI-Express is a serial
digital interface technology that is specifically designed to offer
dedicated bandwidth to each plug-in device while reducing the PCB
design complexity. The X64 CL Express supports up to two independent
Base or one Medium Camera Link color and/or monochrome cameras. Its
low cost, combined with its ability to reformat input data from
multi-tap area and linescan cameras in addition to its onboard FPGA
based processing (including Bayer decoding and real-time shading
correction) makes the X64-CLExpress an ideal
solution to a wide variety of cost-sensitive applications where
flexibility, performance and reliability cannot be compromised.
Fully supported on Microsoft Windows® XP Professional and 2000, the
X64-CL-Express now also supports Microsoft Windows
XP Professional x64, a 64-bit operating system for processors with
64-bit extension to x86 architecture1. The 64-bit OS support is
especially advantageous for high-performance machine vision
applications that require large amounts of memory to store and
process long sequences of images. The X64-CL Express is capable of transferring images above and beyond
4GB memory address space thereby utilizing the maximum available
physical memory. High-performance machine vision applications such
as web surface inspection and wafer inspection require large amounts
of data and directly benefit by overcoming the 4GB address space
limitation of 32-bit OS.
The X64-CLExpress has been built within Teledyne
DALSA's Trigger-to-Image Reliability technology framework. High-
speed in-line machine vision applications require tight integration
between the trigger, strobe, camera exposure and frame grabber
acquisition to ensure data integrity. Trigger-to-Image Reliability
leverages Teledyne DALSA's hardware and software innovations to
control, monitor and correct the image acquisition process from the
time an external trigger event occurs to the moment the data is sent
to the PCI bus, providing traceability when errors do occur and
permitting recovery from those errors.
The X64-CL-Express further facilitates ease-of-use
by utilizing visual status LEDs, mounted on the card's bracket, to
simplify system installation and setup. A status indicator LED
provides visual feedback when the correct camera connection is made
and when a grab is in progress. These visual indicators allow
developers to instantly recognize if cabling has been correctly set
up greatly facilitating the diagnostic process.
The X64-CL Express features trigger input along
with a strobe control output signals, to synchronize image captures
with external events.
The Quadrature shaft-encoder input, enables the X64CL Express to
acquire images from line scan cameras synchronously to the speed of
the web. Higher quality images make processing more accurate and
tolerant to motion artifacts.
The X64-CLExpress offers optional opto-coupled
input modules for demanding industrial environments. These
interrupt-driven, general-purpose input and output controls allow
X64-CL-Express boards to react to external inputs
more rapidly and predictably to increase the quality of acquired
images.
The X64-CL Express features two independent onboard
serial communication ports that provide integrated support for
camera control and setup for machine vision applications. PC-
independent in nature, this communication port can be used with
off-the-shelf communication utilities such as HyperTerminal to
control and configure Camera Link cameras with ease and without
requiring additional external cabling.
As a part of its standard features set, the X64-CLExpress offers an FPGA based image processor called the Re-loadable Processing Engine (RPE). Fast and efficient, the RPE frees up the host CPU from performing tasks such as shading
correction and Bayer decoding while delivering images that can be
readily used by demanding vision applications without further
preprocessing.
Configured to decode Bayer Mosaic Filter images, the RPE supports
Base and Medium cameras in a multitude of tap configurations.
Designed with flexibility in mind, the X64-CL-Express can handle various Bayer patterns and provides
control for gamma correction and white balance to produce accurate
RGB images. To further facilitate the needs of high performance
colour applications, the X64-CL Express can capture
and convert images from 8, 10, and 12-bit Bayer cameras.
To overcome the image artifacts caused by non-uniform illumination,
non-uniform sensor response, dark current, and defective pixel
elements, the X64-CLExpress can be configured to
perform real-time shading correction. Capable of supporting Base and
Medium configurations, the shading correction engine is user
configurable and comes bundled with a calibration utility to
generate gain and offset maps.
The X64-CL-Express is supported by Teledyne DALSA's
SaperaTM Essential software libraries for image acquisition and
control. Using Microsoft .Net and Visual Studio 6.0 development
environment, Sapera Essential applications can be developed using C
++ classes, C DLL or ActiveX controls under Windows® 2000, Windows®
XP, and Windows XP Professional x64 platforms. An integral part of
Teledyne DALSA's stringent Trigger-to-Image Reliability technology
framework, Sapera Essential supports the full suite of Teledyne
DALSA's hardware platforms. In addition, the Sapera Essential
includes powerful diagnostics and setup utilities for application
development, custom camera configurations and system deployment.
Teledyne DALSA's SaperaTM Processing software library is a set of
high performance C++ classes for image processing and analysis for
machine vision applications. Sapera Processing library includes over
300 image processing functions and offers powerful pattern matching,
optical character recognition, bar code and blob analysis tools.
Delivering fast and secure data transfers with zero CPU usage, the
X64- CL Express's Data Transfer Engine (DTE) features a high speed
memory interface, multiple independent Direct Memory Access (DMA)
controllers, and on-board tap descriptors. The X64-CL
Express's DTE supports Windows XP Professional x64 memory
models. This allows the DTE to transfer long sequences of images in
real-time to memory locations above and beyond 4GB address space
without any special modes or OS configurations.
The DTE also performs real-time input tap adjustments for direction
(tap reversal/inversion), pixel overlap and under lap. This enables
the DTE to deliver images that are ready for processing and
liberating the host CPU for image analysis tasks. In addition, the
DTE performs autonomous andvrobust image transfers to ensure data
integrity during continuous image acquisition in non-real-time
operating systems, such as Windows® 2000, Windows® XP Professional
and Windows XP Professional x64.
Similar Models:
X64-
CL Full: 1 Base, Med. or full Inputs; Pixel Clock upto 85 MHz;
PCI-64/PCI-X 66 Host Bus.
X64-
CL iPro: 2 Base or 1 Medium Inputs; Pixel Clock upto 85 MHz;
PCI-64/PCI-X 66 Host Bus.
X64-
AN Quad: RS 170,CCIR, or progressive = 4 independent; Pixel
Clock upto 50 MHz; PCI-64/PCI-X 66 Host Bus.
X64-
LVDS: up to 8 taps Inputs; Pixel Clock up to 75 MHz; PCI-
64/PCI-X 66 Host Bus.










