Dalsa-Coreco XCELERA-CL PX4 SE Digital Frame Grabber
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→ Acquisition: Supports one Base, Medium or Full Camera Link area or line scan camera; Acquisition pixel clock rates up to 85MHz
→ Resolution: Horizontal Size (min/max) = 8 byte/256K bytes; Vertical Size (min) = 1 line/infinite lines for line-scan cameras; Vertical Size (max) = 1 line/16million lines/frame for area-scan cameras; Variable length frame size from 1 to 16 million lines for area or line scan cameras; 128MB onboard frame buffer memory; Integrated advanced tap reversal engine allows independent tap
→ formatting Pixel Format and Tap configurations: Supports Camera Link tap configurations for 8, 10, or 12-bit mono and RGB; For Base cameras in any of the following combinations = 3x8-bit/tap, 2x10-bits/tap, 2x12-bit/tap, 1x14- bit/tap, 1x16-bits/tap, & 1x24-bit/RGB; For Medium camera - 4x8- bit/tap, 4x10-bits/tap, 4x12-bit/tap, 1x30-bit/RGB, & 1x36- bits/tap; For Full – 8x 8-bit/tap CameraLink, 10x8-bit non-Camera Link configuration
→ Transfers: Real-time transfers to system memory; Intelligent Data-Transfer-Engine automatically loads scatter-gather and tap description tables from the host memory without CPU intervention
→ Bayer Mosaic Filter: Hardware Bayer Engine supports one 8, 10 or 12-bit Bayer camera input; Bayer output format supports 8 or 10-bit RGB/pixel; Supports Camera Link Base Camera Link cameras; Zero host CPU utilization for Bayer conversion
→ Bayer to L*a*b Converter: Hardware Bayer engine supports 8, 10 or 12-bit Bayer cameras; Output format supports 8, 10 or 12 L*a*b with raw Bayer output in 8, 10 or 12-bit/pixel; Supports Camera Link Base Link cameras Planar or packed data formats; Zero host CPU utilization for Bayer conversion
→ Shading Correction: On the fly flat-line and flat-field correction with deadpixel replacement; Supports Camera Link Base, Medium or Full cameras; User programmable calibration gain/offset maps; Up to 16 calibration sets can be loaded on the board; RLE Max Image Size = 8k x 64k; Max Taps = 8-bit/8 taps; Pixel Format = 8, 10, 12, 14 and 16-bit/pixel; Max Number of threshold = 32
→ Output Lookup Tables: Supports up to 16 lookup tables simultaneously in Monochrome = 256x8-bit, 1024x10-bit, 1024x8-bit, 4096x12-bit, 4096x10-bit or 4096x8-bit Color: 8-bit in/out, 10-bit in 8 or 10-bit out, 12-bit in 12, 10 or 8-bit/out Lookup table
→ Controls: Comprehensive event notification includes end/start-of-field/frame/transfer; Camera control signals for external event synchronization; Optically isolated TTL/LVDS trigger input programmable as active high or low (edge or level trigger); TTL Strobes output; PC independent serial communications ports provide support 9600 to 11500K baud; Appear as system serial ports enabling seamless interface to host applications
→ Shaft-Encoder Input: Optically isolated quadrature (AB) shaft-encoder inputs for external web synchronization; Supports up/down scaling
→ On-board I/Os: 4-optically isolated general purpose inputs support 5V and 24V DC signals, switch selectable, 4 general purpose outputs
→ Power Output: Power-on-reset fused 12V output @ 1.5A 5V DC output at 1.5A
→ Software: Device driver supports = Microsoft Windows XP/VISTA compliant, Supports Microsoft Windows VISTA 64-bit; Full support of DALSA's Sapera Essential, Sapera LT and Sapera Processing software libraries; Application development using C DLLs and ActiveX controls with Microsoft Visual Studio
→ System Requirements: PCI Express 1.1 or higher compliant with one x4 slot system with 64MB or higher system memory
→ Dimensions: 6.375" (16.2cm) Length X 4.20" (10.7cm) Height)
→ Temperature: 0°C (32° F) to 55° C (131° F)
→ Relative Humidity: up to 95% (non-condensing)
→ Markings: FCC Class B – Approved; CE – Approved
→ Product ID: OR-X4C0-SEF00
→ Camera Interface: 1 Base, Med., or Full
→ Camera Format: Base, Med., Full Camera Link
→ Pixel Clock: up to 85 MHz
→ Bits/Pixel: up to 16
→ Number of Camera Taps: up to 8 taps/8-bit
→ Host Bus: PCIe x4
→ Frame Buffer: 128 MB
→ Advanced Features: Dynamic LUTS, Multi Flat Field/Line, Dead Pixel, Bayer, Multi-level RLE, RGB to L*a*b, PoCL
→ OS Support: XP Pro, Vista (32/64-bit)
→ Software: Sapera LT, 32/64- bit
→ GPIO: On-board 4-in/4-out
→ Half-length PCI Express x4 Board
→ Rapid image acquisition rates up to 255MB/s per input channel (510MB/s total)
→ Image transfer to host memory at 1024MB/s
→ Onboard processing including FPGA based processing engine
→ Bayer decoding and real-time shading correction for each input
→ Power over Camera Link (POCL) capable
→ ROHS compliant
→ Supports area or line scan Base, Medium or Full Camera Link® cameras
→ Supports Power-Over-Camera Link for Base Cameras
→ On-board image pre-processing functions
→ Multi-threshold real-time RLE
→ Color space conversion
→ Dynamic multiple LUTs
→ Dynamic multiple FFC/FLC
→ Concurrent multiple output streams for raw and processed images
→ Rapid image acquisition rates up to 1GB/s and high-speed image
→ transfer to host memory at 1GB/s
→ Windows Vista and XP Professional compatible (32/64-bit)
Embedded Processing Frame Grabber with PCI Express x4 Interface
Building on the field proven technology and performance of DALSA's
X64 frame grabbers the new Xcelera Series leverages the PCI Express
(PCIe) platform to bring traditional image acquisition and
processing technology to new levels of performance and flexibility.
The PCIe host interface is a point to point host interface allowing
simultaneous image acquisition and transfer without loading the
system bus and involving little intervention from the host CPU.
The X64 Xcelera-CL PX4 SE is a highly versatile
PCIe frame grabber capable for one Camera Link™ Base, Medium, or
Full camera and performing image transfers at rates up to 1024MB/s.
Its low cost, combined with its ability to support multiple tap
configurations from area and linescan monochrome/RGB cameras
simultaneously; in addition to its onboard FPGA Bayer decoding and
real-time shading correction makes the X64 Xcelera-CLPX4SE an ideal solution to a wide variety of cost-
sensitive applications.
The X64 Xcelera-CL-PX4-SE offers real-time image
processing functions such as Run-length Encoding (RLE), color space
conversion for Bayer, RGB and CIELAB, multiple dynamically
switchable lookup tables and support for multiple shading
correction configuration sets.
Advanced PCIe x4 image acquisition and processing
The PCIe host interface is a point-to-point interface that
facilitates simultaneous image acquisition and transfer without
loading the system bus or requiring significant intervention from
the host CPU.
The X64 Xcelera-CL PX4 SE is a Camera Link frame
grabber that uses a PCI Express x4 interface. Compatible with a
Base, Medium or Full Camera Link camera, the X64 Xcelera-
CLPX4SE board supports a wide variety of multi-tap area
and line scan color and monochrome cameras. For greater
versatility, X64 Xcelera-CL PX4 SE can be interfaced with custom
camera pixel depths and tap configurations such as 10-taps
cameras.
Designed with the requirements of machine vision OEMs in mind, the
Xcelera Series of products deliver bandwidth of 1GB/sec over
multiplelane PCI Express implementations with room to grow.
Run-Length Encoding
Run-Length Encoding (RLE) is a technique widely used to perform
blob analysis operations, to detect defects or to classify objects.
This technique is also used in image processing applications to
reduce raw input data. X64 Xcelera-CL-PX4-SE
features 32 level thresholding and dual-destination output streams
when performing run-length encoding functions. It is, therefore,
possible to transfer the input image and the processed data
simultaneously to the host computer for subsequent processing.
The RLE output format from the X64 Xcelera-CL PX4
SE is fully compatible with DALSA's Sapera Essential
Blob-Analysis tool and can be combined to increase the processing
speed.
The board's hardware assisted run-length encoding functions support
8, 10 or 12-bit area or line scan cameras in Base, Medium or Full
Camera Link configurations.
.
The X64 Xcelera-CLPX4SE offers real-time image
processing functions such as Run-length Encoding (RLE), color space
conversion for Bayer, RGB and CIELAB, multiple dynamically
switchable lookup tables and support for multiple shading
correction configuration sets.
Color Space Converter
The X64 Xcelera-CL-PX4-SE offers real-time color
space conversion for the L*a*b color space, including RGB to
CIELAB, Bayer to CIELAB 1, and Bayer to RGB color conversion
capabilities. The CIELAB (L*a*b*) algorithm represents the most
perceptually linear color space. By removing the affects of
luminance, the color representation is perceptually more precise
allowing color segmentation to be more perceptually accurate than
any other color space technique. This compute-intense algorithm
supports 8, 10 and 12-bit color pixel formats.
Dual Destination Transfers
The X64 Xcelera-CL PX4 SE is capable of
transferring raw, processed and converted images simultaneously to
the host memory. The transferred images can be sent to independent
image destination buffers to avoid unnecessary copying operations.
The PCIe bandwidth is exploited to its fullest by combining
multiple pixel formats in one transfer operation. User applications
benefit from having data in ready-to-use packed or planar formats
while having access to the original image intact, making the best
use of available resources.
Dynamic Look-Up-Tables (LUTs)
The X64 Xcelera-CLPX4SE supports multiple input
lookup tables that, once loaded, can be switched dynamically while
grabbing images. Dynamic LUTs are useful in applications where the
sequence of images being acquired requires different thresholds due
to varying lighting angles and sources.
Multi-FFC/FLC
Similar to Dynamic LUTs, the X64 Xcelera-CL-PX4-SE
offers a multiple Flat-Field Correction and Flat-Line Correction
(FFC/FLC) feature. The multi-FFC/FLC can be used in applications
where gain and offset parameters require modifications due to
extreme thermal, line rate, exposure time, or direction variation.
The calibration sets can be generated ahead of time for different
operating conditions and utilized at run-time without stopping
production lines.
Software Support
The X64 Xcelera-CL PX4 SE is supported by a
feature rich software package including: Sapera Essential, board
level image acquisition and control libraries and advanced embedded
processing functions for RLE, color space conversion, dynamic LUT
and multi-FFC/FLC capabilities; plus extensive example
applications, documentation and application source code. This
advanced software library supports Windows XP Professional and
Windows Vista (32/64-bit). Applications can be developed using
Microsoft Visual C/C++ 6.0 or higher in 32 bit environment and
Microsoft Visual Studio 2005 or above in 64-bit environment.
Similar Models:
Xcelera-CL LX1 Base: 1 Base Inputs;Pixel clock upto 85 MHz;PCle x1 Host Bus
Xcelera-AN LX1 Quad: RS170, CCIR,or progressive scan=4 independent inputs;Pixel Clock upto 40MHz;PCle x1 Host Bus
Xcelera-CL PX4 Dual: 2 base or 1 med Inputs;Pixel Clock upto 85MHz;PCle x4 Host Bus
Xcelera-CL PX4 Full: 1 Base,Med. or Full Inputs;Pixel Clock 20 to 85MHz;PCle x8 Host Bus
Xcelera-CL+PX8 Full: 1 Base,Med, or Full Inputs;Pixel Clock 20 to 85MHz;PCle x8 Host Bus
Xcelera-CL+PX8 Dual: 2 Base or 1 Med.Inputs;Pixel Clock 20 to 85MHz;PCle X8 Host Bus
Xcelera-CL PX4 SE: 1 Base Med.or full Inputs;Pixel Clock upto 85 MHz;PCle X4 Host Bus
Xcelera-HS PX8: 1 HSLink Inputs;Pixel Clock N/A;PCle X8 Host Bus
Xcelera-LVDS PX4: 1 up to 8 taps Inputs;Pixel Clock upto 75 MHz;PCle X4 Host Bus
