Dalsa-Coreco XCELERA-LVDS PX4 Digital Frame Grabber
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Price Documents
→ Acquisition: Supports one conventional LVDS, parallel digital area and line scan camera; Acquisition pixel clock rates from 1MHz to 80MHz
→ Resolution: Horizontal Size (min/max): 8 byte/256K bytes; Vertical Size (min) = 1 line/infinite lines for line-scan cameras; Vertical Size (max) = 1 line/16million lines/frame for area-scan cameras; Variable length frame size from 1 to 16 million lines for area-scan cameras; 128MB onboard frame buffer memory; Integrated advanced tap reversal engine allows independent tap formatting
→ Pixel Format and Tap configurations: Supports 8, 10, 12, 14, 16-bit/pixel monochrome or 24, 30, 36, 48-bit RGB; Selectable tap geometry; Support multi-tap configuration for monochrome cameras → Transfers: Real-time transfers to system memory; Intelligent Data-Transfer-Engine automatically loads scatter-gather and tap description tables from the host memory without CPU intervention → Shading Correction: On the fly Flat-line and Flat-field correction with dead-pixel replacement; User programmable calibration gain/offset maps
→ Monochrome: Supports one 8-bit in/out, 10-bit in 8/10-bit out or 12-bit in 8/12-bit out lookup table
→ Colour: Supports one 8-bit in/out, 10-bit in 8 or 10-bit out or 12-bit in 12 or 8-bit/out lookup table
→ Controls: Comprehensive event notification includes end/start-of-field/frame/transfer; Camera control signals for external event synchronization; Optically isolated TTL/LVDS trigger input programmable as active high or low (edge or level trigger); TTL Strobes output; PC independent serial communications ports provide support 9600 to 11500K baud; Appear as system serial ports enabling seamless interface to host applications
→ Shaft-Encoder Input: Optically isolated quadrature (AB) shaft-encoder inputs for external web synchronization; Supports up/down scaling
→ On-board I/Os: 4-optically general purpose inputs tolerate 5V and 24V DC signals; 4 general purpose outputs
→ Power Output: Power-on-reset fused 12V output @ 1.5A 5V DC output at 1.5A
→ Software: Device driver supports = Microsoft Windows XP Professional and Vista compliant; Supports Microsoft Windows XP Professional 64-bit; Full support of Teledyne DALSA's Sapera Essential software libraries; Application development using C DLLs and ActiveX controls with Microsoft Visual Studio
→ System Requirements: PCI Express 1.10 compliant with one x4 slot system with 64MB or higher system memory
→ Dimensions: 6.375" (16.1cm) Length X 4.20" (10.7 cm) Height)
→ Temperature: 0°C (32° F) to 55° C (131° F)
→ Relative Humidity: up to 95% (non-condensing)
→ Markings: FCC Class B – Approved; CE – Approved
→ Half-length PCI Express x4 Board
→ Acquires images from conventional LVDS camera
→ Rapid image acquisition rates up to 1GB/s and high-speed image transfer to host memory at 1GB/s
→ Supports pixel clock up to 80MHz
→ Windows Vista, XP Professional (32/64-bit) compatible
→ ROHS compliant
→ Teledyne DALSA Platform Development Advantage – Free Run-time Licensing
Fast, flexible, highly reliable image acquisition
The X64 Xcelera-LVDS PX4 is a PCIe x4 frame
grabber for conventional parallel digital output cameras. As part
of Teledyne DALSA's flagship Xcelera Series of high-performance
frame grabbers, the Xcelera-LVDS leverages the PCI Express (PCIe)
platform to bring traditional image acquisition and processing
technology to new levels of performance and flexibility. The PCIe
host interface is a point-to-point interface that facilitates
simultaneous image acquisition and transfer without loading the
system bus or requiring significant intervention from the host CPU.
Designed with the requirements of machine vision OEMs in mind, the
Xcelera Series of products range from entry level frame grabbers to
high-performance image acquisition and processing boards.
The X64 Xcelera-LVDSPX4 has been built within
Teledyne DALSA's Trigger-to-Image Reliability (T2IR) technology
framework. The T2IR technology leverages Teledyne DALSA's hardware
and software innovations to control, monitor and correct the image
acquisition process from the time that an external trigger event
occurs to the moment the data is sent to the host, providing
traceability when errors do occur and permitting recovery from
those errors. The X64 Xcelera-LVDS PX4 supports a wide variety of
multi-tap area and line scan color and monochrome cameras.
Software Support.
The Xcelera series is fully supported by Teledyne DALSA's Sapera
Essential machine vision software package. Sapera Essential is a
cost-effective software development toolkit that bundles board
level image acquisition and control software libraries with highly
advanced image processing capability including geometric search,
OCR, 1D/D2 barcode symbology, calibration and blob analysis tool
along with over 350 highly optimized image processing functions.
Sapera Essential is designed to deliver the critical functionality
required by machine vision OEMs: develop, deploy, redistribute and
maintain high-performance imaging applications while at the same
time significantly lower the total cost of ownership.
Teledyne DALSA Platform Development Advantage - Free Run-Time
Licensing
The Sapera Essential standard processing tool run-time license is
offered at no additional charge when combined with the Teledyne
DALSA frame grabbers. This software run-time license1 includes
access to over 400 image processing functions, area-based
(normalized correlation based) template matching tool, blob
analysis and lens correction tool.
Similar Models:
Xcelera-CL LX1 Base: 1 Base Inputs;Pixel clock upto 85 MHz;PCle x1 Host Bus
Xcelera-AN LX1 Quad: RS170, CCIR,or progressive scan=4 independent inputs;Pixel Clock upto 40MHz;PCle x1 Host Bus
Xcelera-CL PX4 Dual: 2 base or 1 med Inputs;Pixel Clock upto 85MHz;PCle x4 Host Bus
Xcelera-CL PX4 Full: 1 Base,Med. or Full Inputs;Pixel Clock 20 to 85MHz;PCle x8 Host Bus
Xcelera-CL+PX8 Full: 1 Base,Med, or Full Inputs;Pixel Clock 20 to 85MHz;PCle x8 Host Bus
Xcelera-CL+PX8 Dual: 2 Base or 1 Med.Inputs;Pixel Clock 20 to 85MHz;PCle X8 Host Bus
Xcelera-CL PX4 SE: 1 Base Med.or full Inputs;Pixel Clock upto 85 MHz;PCle X4 Host Bus
Xcelera-HS PX8: 1 HSLink Inputs;Pixel Clock N/A;PCle X8 Host Bus
